We want to develop our Ultrasound system data acquisition subsystem with optimized and upgraded with the PCIe gen3 interface. For the most demanding applications, the system should be supported up to two PCIe 16-lanes data links to an external PC – resulting in an aggregated data bandwidth of 32GB/s. So for doing this project, we need an electrical engineer.
- Complete mastery of FPGA coding
- Reporting to: FPGA developer.
- Length of Probation Period: 1 Month.
- Working hours: Full time.
- Gross Monthly Base Salary: It is negotiable, but our offer is between 9 to 12 million.
- Commission / Bonus / Benefits: Rewards if the project is successful on time.
- Experience working with Xilinx family FPGA and SDK environment
- Mastering the design of Analog to Digital converters
- Familiar with the design of high-frequency telecommunication boards
- Mastery of VHDL hardware description language
- Mastery of ZYNQ family and complete familiarity with different types of AXI bass
- University Qualifications: At least a bachelor's degree.
- Nature and length of previous experience: 7 years experience as FPGA developer and ADC .
- Soft Skills and Personality traits: Teamwork, adaptability.